# LR(1) and LALR(1) but not SLR(1) grammar from the Dragon book nonterminal S Integer nonterminal L Integer nonterminal R Integer terminal = * typedterminal id String topsym S S --> L = R S --> R L --> * R L --> id R --> L EOF /////////////////////// SLR(1) output (fsm state transitions at end) ! Possible shift-reduce conflict. Conflict state: S --> L .= R R --> L . FSM with 11 states created state 0: S --> .L = R S --> .R L --> .* R L --> .id R --> .L START --> .S EOF state 1: S --> L .= R R --> L . state 2: S --> R . state 3: L --> .* R L --> * .R L --> .id R --> .L state 4: L --> id . state 5: START --> S .EOF state 6: S --> L = .R L --> .* R L --> .id R --> .L state 7: L --> * R . state 8: R --> L . state 9: START --> S EOF . state 10: S --> L = R . Nullible Nonterminals: FIRST SETS: S : * id L : * id R : * id START : * id FOLLOW SETS: S : EOF L : = EOF R : = EOF START : Code generated that sets the finite state machine: public void settable() { for(int i=0;i<11;i++) FSM.add(new Hashtable()); FSM.get(0).put("*",new shift(3)); FSM.get(0).put("id",new shift(4)); FSM.get(0).put("S",new gotonext(5)); FSM.get(0).put("L",new gotonext(1)); FSM.get(0).put("R",new gotonext(2)); FSM.get(1).put("=",new shift(6)); FSM.get(1).put("EOF",new reduce(4)); FSM.get(2).put("EOF",new reduce(1)); FSM.get(3).put("*",new shift(3)); FSM.get(3).put("id",new shift(4)); FSM.get(3).put("L",new gotonext(8)); FSM.get(3).put("R",new gotonext(7)); FSM.get(4).put("=",new reduce(3)); FSM.get(4).put("EOF",new reduce(3)); FSM.get(5).put("EOF",new accept()); FSM.get(6).put("*",new shift(3)); FSM.get(6).put("id",new shift(4)); FSM.get(6).put("L",new gotonext(8)); FSM.get(6).put("R",new gotonext(10)); FSM.get(7).put("=",new reduce(2)); FSM.get(7).put("EOF",new reduce(2)); FSM.get(8).put("=",new reduce(4)); FSM.get(8).put("EOF",new reduce(4)); FSM.get(10).put("EOF",new reduce(0)); } // settable //////////////////////////// Full LR(1) output: FSM with 15 states created state 0: S --> .L = R , EOF S --> .R , EOF L --> .* R , = L --> .* R , EOF L --> .id , = L --> .id , EOF R --> .L , EOF START --> .S EOF , EOF state 1: S --> L .= R , EOF R --> L . , EOF state 2: S --> R . , EOF state 3: L --> .* R , = L --> .* R , EOF L --> * .R , = L --> * .R , EOF L --> .id , = L --> .id , EOF R --> .L , = R --> .L , EOF state 4: L --> id . , = L --> id . , EOF state 5: START --> S .EOF , EOF state 6: S --> L = .R , EOF L --> .* R , EOF L --> .id , EOF R --> .L , EOF state 7: L --> * R . , = L --> * R . , EOF state 8: R --> L . , = R --> L . , EOF state 9: START --> S EOF . , EOF state 10: S --> L = R . , EOF state 11: L --> .* R , EOF L --> * .R , EOF L --> .id , EOF R --> .L , EOF state 12: L --> id . , EOF state 13: R --> L . , EOF state 14: L --> * R . , EOF Nullible Nonterminals: FIRST SETS: S : * id L : * id R : * id START : * id fsm 0,* = s3 fsm 0,id = s4 fsm 0,S = g5 fsm 0,L = g1 fsm 0,R = g2 fsm 1,= = s6 fsm 1,EOF = r4 fsm 2,EOF = r1 fsm 3,* = s3 fsm 3,id = s4 fsm 3,L = g8 fsm 3,R = g7 fsm 4,= = r3 fsm 4,EOF = r3 fsm 5,EOF = ac fsm 6,* = s11 fsm 6,id = s12 fsm 6,L = g13 fsm 6,R = g10 fsm 7,= = r2 fsm 7,EOF = r2 fsm 8,= = r4 fsm 8,EOF = r4 fsm 9,EOF = r5 fsm 10,EOF = r0 fsm 11,* = s11 fsm 11,id = s12 fsm 11,L = g13 fsm 11,R = g14 fsm 12,EOF = r3 fsm 13,EOF = r4 fsm 14,EOF = r2