Dr. Chuck C. Liang
Phone: (860) 297 5395 (Trinity College)
Email: chuck.liang@mail.trincoll.edu

Course Description:

This is a course on the organization and architecture of computer hardware using the "layered" approach, with emphasis on CPU design and programming. After a crash course on binary arithemetics, we begin by looking at computer architecture at the digital logic layer. At this layer, we develop the basic components and tools required to design a CPU (central processing unit). The second layer then explores the "mirco" or interior organization of the CPU using the tools developed in the first layer. Our study of this second layer well center around a specific example of a microarchitecture. We'll then move on to the "software" layer, in which the CPU is programmed to interact with the rest of the computer system. The emphasis of this layer will be on assembly language programming. We will be writing several programs on IBM PC compatibles using Intel "x86" assembly language. Finally, we shall explore how CPU design is related to higher-level programming languages and issues. This will involve a discussion of the RISC v.s. CISC architecture controversy. Advanced topics will be covered as time allow.

Text and References:

The required text for this course is "Structured Computer Organization, 3rd edition" by Andrew S. Tanenbaum. Much additional reference material will be provided to you in the form of handouts. Additional references are also available on the class homepage at at http://www2.trincoll.edu/~cliang/groton.

Tentative List of Topics:

1. Introduction: the layered approach to computer science (Chap. 1)
2. Computer Arithemetics (Chap. 2, Appendices A, B)
   • Binary numbers, conversion
   • Bits and bytes, memory addresses, hexdecimal numbers
   • Representing integers, Two's complement
   • Representing floating point numbers, IEEE 754 standard
3. Digital Logic (Chap. 3)
   • Boolean algebra and gates
   • Combinational circuits, K-maps
   • Arithemetic and logic circuits
   • Memory circuits
   • State machines and sequential circuits
   • Computer Buses
4. Microarchitecture: the interior of the CPU (Chap. 4)
   • CPU cycle and components
   • Microinstruction sequencing
   • Microprogramming
   • Other microarchitecture issues (interrupts, pipelines)
5. Macroarchitecture: The Instruction Set (Chap. 5,8)
   • Types of instructions
   • Instruction formats
   • Addressing modes
   • Interrupts and context switches
   • RISC, CISC design choices
6. Intel x86 Assembly Language Programming (Chap. 5,7)
   • Instruction set and format
   • BIOS and DOS interrupts
   • Memory-mapped IO (bit-mapped graphics)
   • MMX (matrix math) instructions
   • 32 bit "protected" mode operation
   • Incorporating assembly code in high-level languages
7. Advanced topics (if time allow)

Exams, Assignments and Grading

All material handed in must be in hard copy, and be well organized and legible. Unreadable material will not be graded. Consultation of outside material for completion of assignments must be pre-approved. Late assignments will not be accepted.

Attendance

Final Note: The contents of the this syllabus may be modified according to the progress of the course